Senior/Principal Process Integration Engineer for NAND Flash

Key Responsibilities: Lead the architecture design (e.g. memory cells, select transistors, and peripheral devices), process integration, electrical characterization, modeling and simulation, failure analysis for 3D NAND devices. Design and execute DoE, analyze the impact of process variations on device performance and reliability (such as durability and data retention), and propose improvement solutions. Collaborate with the process development team to assess new device architectures, driving technology iteration. Write detailed technical reports and support customers or internal teams in resolving related technical issues. Required Qualifications: Education: Master's degree or above Major: Microelectronics, physics, material science & engineering, chemistry; Other Requirements: 8+ years of semiconductor device work experience, 3+ years of 3D NAND work experience. In-depth knowledge of 3D NAND device physics, familiar with its principles, failure modes, and reliability mechanisms. Troubleshooting, and problem-solving capabilities, with experience in successfully improving device performance or yield. Familiar with advanced semiconductor manufacturing processes and integration flows. Strong cross-team communication and collaboration skills. #J-18808-Ljbffr